Method and device for decreasing leakage current of in-cell touch liquid crystal panel

ABSTRACT

The disclosure provides a method and a device for decreasing a leakage current of an in-cell touch liquid crystal panel. The method includes: outputting a signal after adjusting a voltage by the data line during a time period of scanning a touch signal according to a voltage on the data line connected to the pixel and a signal inputted to a common electrode of the pixel for scanning the touch signal, so as to decrease a drain source voltage of a thin film transistor in the pixel. According the method and the device, it is capable of decreasing the leakage current of the in-cell touch liquid crystal panel effectively.

BACKGROUND OF THE INVENTION

Field of the Invention

The disclosure is related to the in-cell touch liquid crystal paneltechnology field, and more particular to a method and a device fordecreasing a leakage current of an in-cell touch liquid crystal panel.

Discussion of the Related Art

The liquid crystal display equipped with the touch panel touch is aportable flat panel display widely usedcurrently, which has beengradually become a display with high-resolution color display screenwidely used by a variety of electronic devices (e.g., a mobilecommunication terminal, a personal digital assistant (PDA), a digitalcamera, a computer, a notebook computer, etc.). In recent years, theoriginal external touch panel member and the liquid crystal panel aremanufactured integrally (in-cell touch), thereby achieving thinness andlightweight of the panel, and the manufacturing cost is saved due to thetouch sensor embedded in the pixel.

Currently, the general in-cell touch liquid crystal displays is usuallycomposed of a upper substrate, a lower substrate and an intermediateliquid crystal layer, and the substrate is composed of a glass, aelectrodes and etc. If both of the upper substrate and the lowersubstrate have electrodes, which may form a display with the verticalelectric field mode, such as TN (twist nematic) mode, VA (verticalalignment) mode, and MVA (Multidomain Vertical Alignment) mode developedfor solving a narrow viewing angle. Another type display is differentfrom the above display, in which the electrode is only located on oneside of the substrate to form a display with the transverse electricfield mode, such as IPS (In-plane switching) mode, FFS (Fringe FieldSwitching) and etc. Since the structure of the in-cell touch liquidcrystal panel, the electrodes thereof often commonly use one electrodeof the vertical electric field or the transverse electric field, i.e.the common electrode, and its operating principle is: when scanning atouch signal, a signal originally inputted to the common electrode forthe display is transformed into a signal for scanning the touch signal,after scanning the touch signal is end, the signal is then transferredinto a signal for the display.

FIG. 1 is a schematic view of a pixel array of an in-cell touch liquidcrystal panel. As shown in FIG. 1, D1-D5 indicate data lines, G1-G5indicate scan lines. FIG. 2 is a schematic view of a pixel circuit. Asshown in FIG. 2, the pixel circuit includes: a thin film transistor, aliquid crystal capacitor (Clc), a storage capacitor (Cst), a parasiticcapacitor (Cgs) between a gate and a source of the thin film transistor,a pixel electrode (pixel ITO), a common electrode on a side of a colorfilter layer and a common electrode on a side of an array layer. Sincein the panel with the transverse electric field mode, there is no commonelectrode on the side of the color filter layer, and there is only thecommon electrode on the side of the array layer. Therefore, the liquidcrystal capacitor and the storage capacitor are connected to the commonelectrode of the side of the array layer.

In the existing in-cell touch liquid crystal panel, a larger leakagecurrent still exists and results in increase of the power consumptionand low frame quality.

SUMMARY

An exemplary embodiment of the disclosure provides a method and a devicefor decreasing a leakage current of an in-cell touch liquid crystalpanel, so as to overcome the problem in which the leakage current of theexisting in-cell touch liquid crystal panel is larger.

According to an exemplary embodiment of the disclosure, a method fordecreasing a leakage current of an in-cell touch liquid crystal panel isprovided, wherein the panel includes a pixel array and a scan line and adata line connected to each pixel in the pixel array. The methodincludes: outputting a signal after adjusting a voltage by the data lineduring a time period of scanning a touch signal according to a voltageon the data line connected to the pixel and a signal inputted to acommon electrode of the pixel for scanning the touch signal, so as todecrease a drain source voltage of a thin film transistor in the pixel.

In one embodiment, the thin film transistor is a P type transistor,wherein, when the voltage on the data line connected to the pixel is ina positive half period and the signal inputted to the common electrodeof the pixel for scanning the touch signal is a pulse signal transformedfrom a low level to a high level, outputting a signal after increasing avoltage by the data line during the time period of scanning the touchsignal.

In one embodiment, a voltage region of the signal of after increasingthe voltage is: [V_(data(min))+(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[V_(data(max))+(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein, V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

In one embodiment, thin film transistor is a N type transistor, wherein,when the voltage on the data line connected to the pixel is in anegative half period and the signal inputted to the common electrode ofthe pixel for scanning the touch signal is a pulse signal transformedfrom a high level to a low level, outputting a signal after decreasing avoltage by the data line during the time period of scanning the touchsignal.

In one embodiment, a voltage region of the signal after decreasing thevoltage is: [−V_(data(min))−(Vgh-Vgl)*Cgs/(Clc_(min)+Cst)] to[−V_(data(max))−(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein, V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

According to another exemplary embodiment of the disclosure, a devicefor decreasing a leakage current of an in-cell touch liquid crystalpanel is provided, wherein the panel includes a pixel array and a scanline and a data line connected to each pixel in the pixel array. Thedevice includes: a voltage control unit, for outputting a signal afteradjusting a voltage through the data line during a time period ofscanning a touch signal according to a voltage on the data lineconnected to the pixel and a signal inputted to a common electrode ofthe pixel for scanning the touch signal, so as to decrease a drainsource voltage of a thin film transistor in the pixel.

In one embodiment, the thin film transistor is a P type transistor,wherein, when the voltage on the data line connected to the pixel is ina positive half period and the signal inputted to the common electrodeof the pixel for scanning the touch signal is a pulse signal transformedfrom a low level to a high level, the voltage control unit outputs asignal after increasing a voltage by the data line during the timeperiod of scanning the touch signal.

In one embodiment, a voltage region of the signal after increasing thevoltage is: [V_(data(min))+(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[V_(data(max))+(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein, V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

In one embodiment, the thin film transistor is a N type transistor,wherein, when the voltage on the data line connected to the pixel is ina negative half period and the signal inputted to the common electrodeof the pixel for scanning the touch signal is a pulse signal transformedfrom a high level to a low level, the voltage control unit outputs asignal after decreasing a voltage through the data line during the timeperiod of scanning the touch signal.

In one embodiment, a voltage region of the signal of after decreasingthe voltage is: [−V_(data(min))−(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[−V_(data(max))−(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein, V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

According to the exemplary embodiment of the disclosure, in the methodand the device for decreasing the leakage current of the in-cell touchliquid crystal panel, it is capable of decreasing the drain sourcevoltage of the thin film transistor in the pixel, thereby effectivelydecreasing the leakage current and increasing the frame quality.

In the following description, it will explain the additional aspectsand/or advantages of the overall concept of the disclosure in part, anda part will be obvious through the description, or it may be knownthrough the implementation of the overall concept of the disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic view of a pixel array of an in-cell touch liquidcrystal panel;

FIG. 2 is a schematic view of a pixel circuit;

FIG. 3 is a flowchart of a method for decreasing a leakage current of anin-cell touch liquid crystal panel according to an exemplary embodimentof the disclosure;

FIG. 4 is a schematic view of the leakage current for a P-type thin filmtransistor according to an exemplary embodiment of the disclosure;

FIG. 5 is a correlogram before and after increasing a voltage for theP-type thin film transistor according to an exemplary embodiment of thedisclosure;

FIG. 6 is a schematic view of the leakage current for a N-type thin filmtransistor according to an exemplary embodiment of the disclosure;

FIG. 7 is a correlogram before and after decreasing a voltage for theP-type thin film transistor according to an exemplary embodiment of thedisclosure;

FIG. 8 is a diagram of a device for decreasing a leakage current of anin-cell touch liquid crystal panel according to an exemplary embodimentof the disclosure.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

It will now be detailed with reference to embodiments of the disclosure,and an example of the embodiment is shown in the accompanying drawings,wherein the like reference numeral refers to the same component. Theembodiments are described with reference to the drawings as follows, soas to explain the disclosure.

FIG. 3 is a flowchart of a method for decreasing a leakage current of anin-cell touch liquid crystal panel according to an exemplary embodimentof the disclosure. Here, the in-cell touch liquid crystal panel includesa pixel array and a scan line and a data line connected to each pixel inthe pixel array. The method may be achieved by the in-cell liquidcrystal panel, and may also be achieved by a computer program, therebyachieving the above method when the program is executed.

Refer to FIG. 3. In the step S10, outputting a signal after adjusting avoltage by the data line during a time period of scanning a touch signalaccording to a voltage on the data line connected to the pixel and asignal inputted to a common electrode of the pixel for scanning thetouch signal, so as to decrease a drain source voltage of a thin filmtransistor in the pixel.

Since the capacitor formed by the pixel electrode and the commonelectrode accounts a large portion of the whole for the pixel capacitor;therefore, during the time period of scanning the touch signal, thepixel voltage may generate strong coupling effect following the signalinputted to the common electrode for scanning the touch signal and alarger leakage occurs. Thus according to an exemplary embodiment of thedisclosure, a drain source voltage is decreased by adjusting a voltageon the data line, thereby generating a lower leakage current.

As an example, in a case of the thin film transistor in the pixel is aP-type transistor (e.g., PMOS transistor), and when the voltage on thedata line connected to the pixel is in a positive half period and thesignal inputted to the common electrode of the pixel for scanning thetouch signal is a pulse signal transformed from a low level to a highlevel, a signal after increasing a voltage is outputted by the data lineduring the time period of scanning the touch signal.

Here, the voltage in the positive half period is that a voltage isgreater than or equals to 0, and the pulse signal transformed from thelow level to the high level is that a pulse signal transformed from anegative voltage or a ground voltage to a positive voltage.

As an example, a voltage region of the signal after increasing thevoltage may be: [V_(data(min))+(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[V_(data(max))+(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

FIG. 4 is a schematic view of the leakage current for a P-type thin filmtransistor according to an exemplary embodiment of the disclosure. Here,the abscissa indicates a gate source voltage (Vgs) of the thin filmtransistor, the ordinate indicates a drain source current (Ids) of thethin film transistor, L₁ indicates a IV curve when the drain sourcevoltage of the thin film transistor is higher, L₂ indicates the IV curvewhen the drain source voltage of the thin film transistor is medium, L₃indicates the IV curve when the drain source voltage of the thin filmtransistor is lower, a circle indicates a corresponding position whenthe LCD displays an image (i.e., the signal inputted to the commonelectrode is a signal for the display), a triangle indicates scanningthe touch signal (i.e., the signal inputted to the common electrode is asignal for scanning the touch signal) and a corresponding position whenthe voltage on the data line is not increased, and a diamond indicatesscanning the touch signal and a corresponding position when the voltageon the data line is increased. As shown in FIG. 4, when the signalinputted to the common electrode is the signal for the display (i.e.,the position indicated by the circle), the drain source voltage islower, and thus the leakage current is lower; when the signal inputtedto the common electrode is the signal for scanning the touch signal andthe voltage on the data is not increased (i.e., the position indicatedby the triangle), the drain source is higher, and thus the leakagecurrent is larger. According to the exemplary embodiment of thedisclosure, since the voltage on the data line is increased during theperiod of scanning the touch signal (i.e., the position indicated by thediamond), the drain source voltage is decreased to decrease the leakagecurrent.

FIG. 5 is a correlogram before and after increasing a voltage for theP-type thin film transistor according to an exemplary embodiment of thedisclosure. As shown in FIG. 5, if the voltage on the data line is notincreased during the period of scanning the touch signal, since thecoupling effect occurs, a significant voltage drop (ΔV (leakage)) isgenerated to generate a larger leakage current, thereby increasing thepower consumption and the frame quality is low. If the voltage on thedata line is increased during the period of scanning the touch signal, alower voltage drop is generated, thereby generating a lower leakagecurrent.

As another example, in a case of the thin film transistor in the pixelis a N-type transistor (e.g., NMOS transistor), and when the voltage onthe data line connected to the pixel is in a negative half period andthe signal inputted to the common electrode of the pixel for scanningthe touch signal is a pulse signal transformed from a high level to alow level, outputting a signal after decreasing a voltage by the dataline during the time period of scanning the touch signal.

Here, the voltage in the negative half period is that a voltage is lessthan 0, and the pulse signal transformed from the high level to the lowlevel is that a pulse signal transformed from a positive voltage or aground voltage to a negative voltage.

As an example, a voltage region of the signal after decreasing thevoltage is: [−V_(data(min))−(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[−V_(data(max))−(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein, V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

FIG. 6 is a schematic view of the leakage current for a N-type thin filmtransistor according to an exemplary embodiment of the disclosure. Here,the abscissa indicates a gate source voltage (Vgs) of the thin filmtransistor, the ordinate indicates a drain source current (Ids) of thethin film transistor, L₁ indicates a IV curve when the drain sourcevoltage of the thin film transistor is higher, L₂ indicates the IV curvewhen the drain source voltage of the thin film transistor is medium, L₃indicates the IV curve when the drain source voltage of the thin filmtransistor is lower, a circle indicates a corresponding position whenthe LCD displays (i.e., the signal inputted to the common electrode is asignal for the display), a triangle indicates scanning the touch signal(i.e., the signal inputted to the common electrode is a signal forscanning the touch signal) and a corresponding position when the voltageon the data line is not decreased, and a diamond indicates scanning thetouch signal and a corresponding position when the voltage on the dataline is decreased. As shown in FIG. 6, when the signal inputted to thecommon electrode is the signal for the display (i.e., the positionindicated by the circle), the drain source voltage is lower, and thusthe leakage current is lower; when the signal inputted to the commonelectrode is the signal for scanning the touch signal and the voltage onthe data is not decreased (i.e., the position indicated by thetriangle), the drain source is higher, and thus the leakage current islarger. According to the exemplary embodiment of the disclosure, sincethe voltage on the data line is decreased during the period of scanningthe touch signal (i.e., the position indicated by the diamond), thedrain source voltage is decreased to decrease the leakage current.

FIG. 7 is a correlogram before and after decreasing a voltage for theP-type thin film transistor according to an exemplary embodiment of thedisclosure. As shown in FIG. 7, if the voltage on the data line is notdecreased during the period of scanning the touch signal, since thecoupling effect occurs, a significant voltage drop (ΔV (leakage)) isgenerated to generate a larger leakage current, thereby increasing thepower consumption and the frame quality is low. If the voltage on thedata line is decreased during the period of scanning the touch signal, alower voltage drop is generated, thereby generating a lower leakagecurrent.

FIG. 8 is a diagram of a device for decreasing a leakage current of anin-cell touch liquid crystal panel according to an exemplary embodimentof the disclosure. Here, the in-cell touch liquid crystal panel includesa pixel array and a scan line and a data line connected to each pixel inthe pixel array.

As shown in FIG. 8, according to an exemplary embodiment of thedisclosure, the device for increasing the leakage current of the in-cellliquid crystal panel includes a voltage control unit 10. The unit may beachieved by a common hardware processor, such as a digital signalprocessor, a field programmable gate arrays, and may also be achieved bya dedicated hardware processor, such as a dedicated chip, other commonhardware processor to achieve, but also by dedicated chips, and mayfurther be achieved by a computer program implemented in a software, forexample, it is implemented as a module installed in the software of thein-cell liquid crystal panel.

The voltage control unit 10 is used for outputting a signal afteradjusting a voltage through the data line during a time period ofscanning a touch signal according to a voltage on the data lineconnected to the pixel and a signal inputted to a common electrode ofthe pixel for scanning the touch signal, so as to decrease a drainsource voltage of a thin film transistor in the pixel.

Since a capacitor formed of the pixel electrode and the common electrodeaccounts a large portion of the whole for the pixel capacitor,therefore, during the time period of scanning the touch signal, thepixel voltage may generate strong coupling effect following the signalinputted to the common electrode for scanning the touch signal and alarger leakage occurs, thus according to an exemplary embodiment of thedisclosure, the voltage control unit 10 adjust the voltage on the dataline to decrease the drain source voltage, thereby generating a lowerleakage current.

As an example, in a case of the thin film transistor in the pixel is aP-type transistor (e.g., PMOS transistor), and when the voltage on thedata line connected to the pixel is in a positive half period and thesignal inputted to the common electrode of the pixel for scanning thetouch signal is a pulse signal transformed from a low level to a highlevel, the voltage control unit 10 outputs a signal after increasing avoltage through the data line during the time period of scanning thetouch signal.

As an example, a voltage region of the signal after increasing thevoltage is: [V_(data(min))+(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[V_(data(max))+(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

As another example, in a case of the thin film transistor in the pixelis a N-type transistor (e.g., NMOS transistor), and when the voltage onthe data line connected to the pixel is in a negative half period andthe signal inputted to the common electrode of the pixel for scanningthe touch signal is a pulse signal transformed from a high level to alow level, the voltage control unit 10 outputs a signal after decreasinga voltage through the data line during the time period of scanning thetouch signal.

As an example, a voltage region of the signal of after decreasing thevoltage is: [−V_(data(min))−(Vgh−Vgl)*Cgs/(Clc_(min)+Cst)] to[−V_(data(max))−(Vgh−Vgl)*Cgs/(Clc_(max)+Cst)], wherein V_(data(min))indicates a minimum voltage on the data line, V_(data(max)) indicates amaximum voltage on the data line, Vgh indicates a maximum voltage on thescan line, Vgl indicates a minimum voltage on the scan line, Cgsindicates a capacitance value of a parasitic capacitor between a gateand a source of the thin film transistor, Cst indicates a capacitancevalue of a storage capacitor, Clc_(min) indicates a minimum capacitancevalue of a liquid crystal capacitor, and Clc_(max) indicates a maximumcapacitance value of the liquid crystal capacitor.

According to the exemplary embodiment of the disclosure, in the methodand the device for decreasing the leakage current of the in-cell touchliquid crystal panel, it is capable of decreasing the drain sourcevoltage of the thin film transistor in the pixel, thereby effectivelydecreasing the leakage current and increasing the frame quality.

Although some exemplary embodiments of the disclosure have been shownand described, those skilled in the art should understand that, withoutdeparting from the principles and spirit is defined in the scope of thedisclosure is defined by the claims and their equivalents of the cases,these embodiment may be modified.

What is claimed is:
 1. A method for decreasing a leakage current of anin-cell touch liquid crystal panel, wherein the panel comprises a pixelarray and a scan line and a data line connected to each pixel in thepixel array, the method comprising: during a time period of scanning atouch signal, and according to a voltage detected on the data lineconnected to the pixel and a signal input to a common electrode of thepixel, outputting a signal indicating the voltage has been adjustedthrough the data line so as to decrease a drain source voltage of a thinfilm transistor in the pixel, wherein the thin film transistor is a Ptype transistor or a N type transistor, and during the time period ofscanning the touch signal, and when the voltage on the date line is in apositive half period and the signal input to the common electrode of thepixel for scanning the touch signal has transformed from a low pulsesignal to a high pulse signal, outputting a signal through the data lineindicating that the voltage has been increased, and during the timeperiod of scanning the touch signal, and when the voltage on the dateline is in a negative half period and the signal input to the commonelectrode of the pixel for scanning the touch signal has transformedfrom the high pulse signal to the low pulse signal, outputting a signalthrough the data line indicating that the voltage has been decreased,wherein a voltage region of the signal after increasing the voltage is:[V _(data(min))+(Vgh−Vgl)*Cgs/(Clc _(min) +Cst)] to[V _(data(max))+(Vgh−Vgl)*Cgs/(Clc _(max) +Cst)], wherein a voltageregion of the signal after decreasing the voltage is:[−V _(data(min)))−(Vgh−Vgl)*Cgs/(Clc _(min) +Cst)] to[−V _(data(max))−(Vgh−Vgl)*Cgs/(Clc _(max) +Cst)], wherein,V_(data(min)) indicates a minimum voltage on the data line,V_(data(max)) indicates a maximum voltage on the data line, Vghindicates a maximum voltage on the scan line, Vgl indicates a minimumvoltage on the scan line, Cgs indicates a capacitance value of aparasitic capacitor between a gate and a source of the thin filmtransistor, Cst indicates a capacitance value of a storage capacitor,Clc_(min) indicates a minimum capacitance value of a liquid crystalcapacitor, and Clc_(max) indicates a maximum capacitance value of theliquid crystal capacitor.
 2. A device for decreasing a leakage currentof an in-cell touch liquid crystal panel, wherein the panel comprises apixel array and a scan line and a data line connected to each pixel inthe pixel array, the device comprising: a processor configured to,during a time period of scanning a touch signal, and according to avoltage detected on the data line connected to the pixel and a signalinput to a common electrode of the pixel, output a signal indicating thevoltage has been adjusted through the data line so as to decrease adrain source voltage of a thin film transistor in the pixel, wherein thethin film transistor is a P type transistor or a N type transistor,during the time period of scanning the touch signal, and when thevoltage on the date line is in a positive half period and the signalinput to the common electrode of the pixel for scanning the touch signalhas transformed from a low pulse signal to a high pulse signal, theprocessor outputs a signal through the data line indicating that thevoltage has been increased, and during the time period of scanning thetouch signal, and when the voltage on the date line is in a negativehalf period and the signal input to the common electrode of the pixelfor scanning the touch signal has transformed from a high pulse signalto a low pulse signal, the processor outputs a signal through the dataline indicating that the voltage has been decreased, wherein a voltageregion of the signal after increasing the voltage is:[V _(data(min))+(Vgh−Vgl)*Cgs/(Clc _(min) +Cst)] to[V _(data(max))+(Vgh−Vgl)*Cgs/(Clc _(max) +Cst)], wherein a voltageregion of the signal after decreasing the voltage is:[−V _(data(min)))−(Vgh−Vgl)*Cgs/(Clc _(min) +Cst)] to[−V _(data(max))−(Vgh−Vgl)*Cgs/(Clc _(max) +Cst)], wherein,V_(data(min)) indicates a minimum voltage on the data line,V_(data(max)) indicates a maximum voltage on the data line, Vghindicates a maximum voltage on the scan line, Vgl indicates a minimumvoltage on the scan line, Cgs indicates a capacitance value of aparasitic capacitor between a gate and a source of the thin filmtransistor, Cst indicates a capacitance value of a storage capacitor,Clc_(min) indicates a minimum capacitance value of a liquid crystalcapacitor, and Clc_(max) indicates a maximum capacitance value of theliquid crystal capacitor.